Microeletrônica: Últimas Submissões
Resultados 71-80 de 213
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Parametric analysis and optimization of MOSFET macromodels for ESD circuit simulation
(2018) [Dissertação]Electrostatic discharge (ESD) is a major reliability concern in semiconductor industry. An ESD event may degrade or destroy an integrated circuit (IC), impacting on production yields, manufacturing costs, product quality, ... -
Tackling the drawbacks of a lagrangian relaxation based discrete gate sizing algorithm
(2018) [Dissertação]The shrink of the devices sizes allows the number of transistors in the integrated circuits to grow, leading to an increase in the leakage power. The discrete gate sizing technique consists in assigning each gate of the ... -
Avaliação de aspectos de projeto analógico usando enclosed layout transistors em tecnologia CMOS
(2018) [Tese]Este trabalho estuda o fluxo de projeto analógico com ferramentas de EDA (Electronic Design Automation) comerciais, adotando técnicas de proteção em nível de layout (RHBD – do inglês - Radiation Hardened-By-Design) através ... -
Use of approximate triple modular redundancy for fault tolerance in digital circuits
(2018) [Tese]Triple Modular Redundancy (TMR) is a well-known mitigation technique, which provides a full masking capability to single faults, although at a great cost in terms of area and power consumption. For that reason, partial ... -
Exact multi-level benchmark circuit generation for logic synthesis evaluation
(2018) [Dissertação]Electronic design automation (EDA) tools provide a highly automated flow for integrated circuit (IC) design. This flow may be roughly divided into three main steps: high-level synthesis, logic synthesis and physical ... -
Desenvolvimento de um sistema em chip de processamento online para manutenção inteligente
(2018) [Tese]Estratégias de monitoramento, baseadas na análise da condição de equipamentos utilizando ferramentas de processamento digital de sinais, inteligência artificial e tolerância a falhas, tornam-se cada vez mais necessárias ... -
Logic synthesis for sequential material implication logic based on resistance switching devices
(2017) [Tese]Dispositivos de resistência variável (RSD) são alternativas promissoras para a criação de memórias não voláteis (NVM). Estas memórias também podem influenciar o projeto de circuitos digitais através de “lógica em memória”. ... -
Temperature compensated subthreshold CMOS voltage references for ultra low power applications
(2017) [Dissertação]This work proposes novel temperature-compensated subthreshold voltage references for ultra-low power and ultra-low voltage applications. The core of the proposed circuits is the self-cascode MOSFET (SCM) since it can operate ... -
Modeling and simulation of self-heating effects in p-type MOS transistors
(2018) [Tese]The complementary metal-oxide-semiconductor (CMOS) scaling process of the recent decades, coupled with new device structures and materials, has aggravated thermal problems and turned them into major reliability issues for ... -
Low power SAR analog-to-digital converter for internet-of-things RF receivers
(2018) [Dissertação]The "Internet of Things" (IoT) has been a topic of intensive research in industry, technological centers and academic community, being data communication one aspect of high relevance in this area. The exponential increase ...